A wonder chip of the Bangalore block
A wonder chip of the Bangalore block
Deccan Herald
The Intel India Development Centre (IIDC) has co-developed the world’s first teraflops research chip for building the next generation of high-end computers and servers to deliver supercomputer-like performance...
The Intel India Development Centre (IIDC) has co-developed the world’s first teraflops research chip for building the next generation of high-end computers and servers to deliver supercomputer-like performance.
The 80-core chip, which is less than a fingernail in size, has a powerful programmable processor that can undertake trillions of calculations per second –teraflops consuming only 62 watts of power.
“The multi-core chip with greater computing horse power can be used for diverse research applications such as scientific experiments, weather forecasting, astronomical calculations, oil exploration, financial services, entertainment and personal media services involving huge data processing and number-crunching,” Intel India research centre director Vittal Kini said on Thursday at a preview of the product here.
Collaborating with Intel’s technology group’s circuit research lab at Oregon in the US, the 20-member Indian research team headed by Engineering Manager Vasantha Erraguntla played a central role in developing the teraflops research chip in a record 20 months.
The engineering team of IIDC contributed about 50 per cent of the work consisting of logic, circuit and physical design, while the Oregon centre undertook integration and fabrication of the chip at the company’s fab in Ireland.
Global collaboration
“By advancing into the era of tera, we have demonstrated the power of global collaboration and the capabilities of the Indian engineering talent. Tera-scale performance and the ability to move terabytes of data will play a pivotal role in future computers with ubiquitous access to the Internet by powering new applications for
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education and collaboration,” Erraguntla said.
“The multi-core chip throws up a host of opportunities to use it in artificial intelligence, instant video communications, photo-realistic games, multimedia data mining and real-time speech recognition,” Kini pointed out.
Though Intel has no immediate plans to bring the chip designed with floating point cores to the market, it intends to demonstrate the product to its partners in the industry for offering insights in new silicon design methodologies, high bandwidth inter-connects and energy management approaches.
The 65-nanometre chip is embedded with 100 million transistors and features an innovative tile design in which 80 smaller cores are replicated as tiles. Going forward, Intel plans to use the 45-nanometre silicon wafer for making the teraflops chip with multi-core processors containing billions of transistors.
The chip also features a mesh-like network-on-a-chip architecture for super-high performance between the cores and moving terabits of data per second inside the chip. “The Intel tera-scale computing research programme has over 100 projects to explore other architectural, software and system design challenges,” Kini added.
Incidentally, the 80-core teraflop chip is a big leap in frontier technology as against the first teraflops performance achieved over a decade ago on the ASCI Red Supercomputer built by Intel for the Sandia national laboratory in the US.
“That computer took up more than 2,000 square feet, was powered by 10,000 Pentium pro-processors and consumed over 500 kilowatts of power,” Erraguntala recalled.
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